AMD Mobile Serial VID Dual-Phase
Fixed-Frequency Controller
? V IN ( MAX ) ? ? ? ? η TOTAL ?
PD ( NL Re sistive ) = ? 1 ? ? ? ? ? ? R DS ( ON )
V IN(MIN) , consider reducing the size of N H (increasing
R DS(ON) to lower C GATE ). If V IN does not vary over a
wide range, the minimum power dissipation occurs
where the resistive losses equal the switching losses.
Choose a low-side MOSFET that has the lowest possible
on-resistance (R DS(ON) ), comes in a moderate-sized
package (i.e., one or two 8-pin SOs, DPAK, or D 2 PAK),
and is reasonably priced. Make sure that the DL gate
driver can supply sufficient current to support the gate
charge and the current injected into the parasitic gate-
to-drain capacitor caused by the high-side MOSFET
turning on; otherwise, cross-conduction problems may
occur (see the MOSFET Gate Drivers section).
MOSFET Power Dissipation
Worst-case conduction losses occur at the duty-factor
extremes. For the high-side MOSFET (N H ), the worst-
case power dissipation due to resistance occurs at the
minimum input voltage:
Switching losses in the high-side MOSFET can become
an insidious heat problem when maximum AC adapter
voltages are applied, due to the squared term in the C
x V IN 2 x f SW switching-loss equation. If the high-side
MOSFET chosen for adequate R DS(ON) at low-battery
voltages becomes extraordinarily hot when biased from
V IN(MAX) , consider choosing another MOSFET with
lower parasitic capacitance.
For the low-side MOSFET (N L ), the worst-case power
dissipation always occurs at maximum input voltage:
? ? V OUT ? ? ? I LOAD ? 2
? ?
The worst case for MOSFET power dissipation occurs
under heavy overloads that are greater than
I LOAD(MAX) but are not quite high enough to exceed
the current limit and cause the fault latch to trip. To pro-
tect against this possibility, you can “overdesign” the
PD ( NH Re sistive ) = ? OUT ? I LOAD 2 R DS ( ON )
? V ?
? V IN ?
circuit to tolerate:
I LOAD ( MAX ) = I PEAK ( MAX ) ?
Δ I INDUCTOR
2
= I PEAK ( MAX ) ? ?
?
?
?
PD ( NHSwitching ) = ( V IN ( MAX ) ) ? RSS SW ? I LOAD
where I LOAD is the per-phase current.
Generally, a small high-side MOSFET is desired to
reduce switching losses at high input voltages.
However, the R DS(ON) required to stay within package
power dissipation often limits how small the MOSFET
can be. Again, the optimum occurs when the switching
losses equal the conduction (R DS(ON) ) losses. High-
side switching losses do not usually become an issue
until the input is greater than approximately 15V.
Calculating the power dissipation in high-side MOSFET
(N H ) due to switching losses is difficult since it must
allow for difficult quantifying factors that influence the
turn-on and turn-off times. These factors include the
internal gate resistance, gate charge, threshold volt-
age, source inductance, and PCB layout characteris-
tics. The following switching-loss calculation provides
only a very rough estimate and is no substitute for
breadboard evaluation, preferably including verification
using a thermocouple mounted on N H :
2 ? C   f ?
? I GATE ?
where C RSS is the reverse transfer capacitance of N H
and I GATE is the peak gate-drive source/sink current
(1A typ), and I LOAD is the per-phase current.
? I LOAD ( MAX ) LIR ?
2
where I PEAK(MAX) is the maximum valley current
allowed by the current-limit circuit, including threshold
tolerance and on-resistance variation. The MOSFETs
must have a good-size heatsink to handle the overload
power dissipation.
Choose a Schottky diode (D L ) with a forward voltage
low enough to prevent the low-side MOSFET body
diode from turning on during the dead time. As a gen-
eral rule, select a diode with a DC current rating equal
to 1/3 the load current per phase. This diode is optional
and can be removed if efficiency is not critical.
Boost Capacitors
The boost capacitors (C BST ) must be selected large
enough to handle the gate-charging requirements of
the high-side MOSFETs. Typically, 0.1μF ceramic
capacitors work well for low-power applications driving
medium-sized MOSFETs. However, high-current appli-
cations driving large, high-side MOSFETs require boost
capacitors larger than 0.1μF. For these applications,
select the boost capacitors to avoid discharging the
capacitor more than 200mV while charging the high-
side MOSFETs’ gates:
C BST =
N × Q GATE
200 mV
38
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